部分成文

A题/成文/1封面与前置页.md

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+
+---
+
+# Front Matter（封面与前置页）
+
+## Title（题目）
+
+**A Mechanism-Driven Continuous-Time Model for Smartphone Battery Drain Under Constant-Power Loads: Component Power Mapping, Electro-Thermal-Aging Coupling, and Feasibility-Based Shutdown Prediction**
+
+（若你们中文论文：
+**基于恒功率负载闭环的智能手机电池连续时间机理模型：功耗分解、热-电-老化耦合与可行性掉电判据**）
+
+---
+
+## Team Information（队伍信息：按比赛模板填写）
+
+* **Team Control Number:** [填写]
+* **School/Institution:** [填写]
+* **Team Members:** [填写]
+* **Date:** [填写]
+
+> 注：这一块通常由比赛提交模板决定，你只要把占位符替换成官方要求格式即可。
+
+---
+
+## Abstract（摘要）
+
+Smartphone runtime is governed by multi-source, time-varying power demands from the screen, CPU, and wireless communication, and it often exhibits nonlinear behaviors such as abrupt shutdown at low state-of-charge (SOC), low temperature, or advanced aging. To capture these mechanisms, we develop a continuous-time, physics-informed model featuring a state vector (\mathbf{x}(t)=[z(t),v_p(t),T_b(t),S(t),w(t)]^\top), where (z) is SOC, (v_p) is polarization voltage (memory), (T_b) is battery temperature, (S) is state-of-health (SOH), and (w) represents a continuous network “tail” state. Exogenous inputs (\mathbf{u}(t)=[L(t),C(t),N(t),\Psi(t),T_a(t)]^\top) describe screen brightness, CPU load, network activity, signal quality, and ambient temperature, respectively. Total power demand is decomposed explicitly into screen/CPU/network components, with the network term incorporating a signal-quality penalty and tail dynamics. On the battery side, a first-order equivalent circuit model (ECM) is coupled to the load through a constant power load (CPL) closure, yielding a nonlinear current–voltage feedback and a feasibility discriminant (\Delta(t)\ge 0) that explains voltage collapse and sudden shutdown. Temperature- and SOH-dependent internal resistance and effective capacity are included via Arrhenius and capacity-scaling relations, while a compact SEI-inspired degradation law governs SOH evolution. For robustness and device realism, we add three lightweight refinements: (i) a low-SOC regularization in the OCV model, (ii) a nonnegative polarization heat formulation, and (iii) a temperature-dependent current cap representing OS/PMIC throttling. The resulting framework supports numerical simulation, time-to-empty (TTE) prediction, uncertainty quantification, and actionable power-management recommendations.
+
+---
+
+## Keywords（关键词）
+
+Smartphone battery drain; constant power load (CPL); equivalent circuit model (ECM); electro-thermal coupling; battery aging (SOH); network tail energy; feasibility discriminant; time-to-empty (TTE)
+
+---
+
+# Summary Sheet（MCM 一页摘要页 / Executive Summary）
+
+> **说明**：这一页要“像海报一样快读”。下面版本是可直接交稿的结构；你们跑完仿真后把括号内结果补上即可。
+
+## Problem
+
+We are asked to model smartphone battery drain in continuous time under realistic, time-varying usage. The model must predict battery terminal voltage and SOC evolution and determine the time-to-empty (TTE), while explaining nonlinear shutdown behaviors (e.g., abrupt power-off before SOC reaches zero) under adverse conditions such as poor signal quality, low temperature, and aging.
+
+## Model Overview
+
+**States and inputs.** We define the state vector
+[
+\mathbf{x}(t)=[z(t),v_p(t),T_b(t),S(t),w(t)]^\top,
+]
+where (z) is SOC, (v_p) is polarization voltage, (T_b) is battery temperature, (S) is SOH, and (w) is the continuous network tail state. Inputs are
+[
+\mathbf{u}(t)=[L(t),C(t),N(t),\Psi(t),T_a(t)]^\top,
+]
+describing brightness, CPU load, network activity, signal quality, and ambient temperature.
+
+**Component-level power mapping.** Total demanded power is decomposed as
+[
+P_{\mathrm{tot}}=P_{\mathrm{bg}}+P_{\mathrm{scr}}(L)+P_{\mathrm{cpu}}(C)+P_{\mathrm{net}}(N,\Psi,w),
+]
+with superlinear screen/CPU mappings and an explicit signal-quality penalty plus tail term in the network power.
+
+**Battery dynamics and CPL closure.** A first-order ECM gives terminal voltage
+[
+V_{\mathrm{term}}=V_{\mathrm{oc}}(z)-v_p-I R_0(T_b,S).
+]
+The load is modeled as a constant power load (CPL),
+[
+P_{\mathrm{tot}}=V_{\mathrm{term}}I,
+]
+leading to a quadratic current solution and a feasibility discriminant
+[
+\Delta=(V_{\mathrm{oc}}-v_p)^2-4R_0P_{\mathrm{tot}}.
+]
+When (\Delta<0), maintaining the demanded power becomes infeasible, providing a mechanism for voltage collapse and abrupt shutdown.
+
+**Electro-thermal-aging coupling.** SOC, polarization, temperature, and SOH evolve via coupled ODEs (including Arrhenius resistance, temperature/SOH-dependent effective capacity, and an SEI-inspired SOH decay law). Network tail energy is captured by a continuous-time tail state (w(t)).
+
+**Robustness refinements (lightweight, non-invasive).**
+
+1. Low-SOC regularization in OCV using (z_{\mathrm{eff}}=\max(z,z_{\min})) to avoid singularity.
+2. Nonnegative polarization heat via (v_p^2/R_1) in the thermal source term.
+3. A temperature-dependent current cap (I=\min(I_{\mathrm{CPL}},I_{\max}(T_b))) to represent OS/PMIC throttling.
+
+## Numerical Method
+
+We solve the coupled ODEs using RK4 (or an adaptive Runge–Kutta method) with a nested algebraic current evaluation at each substep. Step size is constrained by the polarization time constant (\tau_p=R_1C_1), and convergence is verified by step-halving until (|z_{\Delta t}-z_{\Delta t/2}|_\infty<10^{-4}), with TTE changes below 1%.
+
+## Key Results (to be filled with your simulations)
+
+* **Baseline runtime (TTE):** mean (\approx) [***] h, median (\approx) [***] h, 5th–95th percentile ([***],[***]) h under the baseline usage scenario.
+* **Sudden shutdown mechanism:** infeasibility events ((\Delta<0)) occur primarily when [high demand + elevated (R_0)] coincide (e.g., weak signal (\Psi\downarrow), low (T_b), low (S)), precipitating rapid voltage collapse.
+* **Impact of throttling (current cap):** applying (I_{\max}(T_b)) increases the 5th-percentile TTE by approximately [***]%, and reduces infeasibility/shutdown-risk events by [***]%.
+* **Sensitivity (Sobol):** the largest total-effect indices are associated with [(k_N,\kappa)] under weak-signal regimes and with [(k_L,\gamma)] under high-brightness usage; ambient temperature (T_a) shows strong interaction effects via (R_0(T_b,S)) and (Q_{\mathrm{eff}}(T_b,S)).
+
+## Conclusions
+
+We present a mechanism-driven continuous-time smartphone battery model that unifies (i) component-level power demand with explicit signal-quality effects and network tail energy, (ii) an ECM battery model coupled through a CPL closure, and (iii) electro-thermal-aging interactions. The feasibility discriminant (\Delta) provides an interpretable explanation for abrupt shutdown behaviors beyond simple SOC depletion.
+
+## Recommendations
+
+* **User-level:** reduce brightness (L) and avoid sustained high-throughput activity (N) in poor signal conditions ((\Psi) low) to mitigate network power amplification and tail energy.
+* **System-level (OS/PMIC):** implement adaptive power caps or temperature-dependent current limits to prevent CPL-driven current escalation at low voltage/high resistance, thereby improving worst-case runtime and reducing collapse risk.
+* **Network-level:** tail-state-aware scheduling (batching transmissions) can reduce (w(t)) and tail energy, improving TTE with minimal user impact.
+
+---
+

A题/成文/2问题重述与建模目标.md

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+%========================================================
+\section{Problem Restatement \& Objectives}
+\label{sec:problem}
+
+\subsection{Restatement of the Problem}
+\label{subsec:restatement}
+The 2026 MCM Problem A concerns continuous-time prediction of smartphone battery drain under time-varying usage.
+A smartphone is subject to multiple power-consuming components---most prominently the display, CPU workload, and cellular/Wi-Fi communication---whose intensities evolve over time according to user behavior and network conditions.
+Meanwhile, the battery exhibits coupled electro-thermal dynamics and gradual health degradation.
+The task is to construct a mechanism-driven, continuous-time model that maps future usage profiles to battery states and terminal voltage, and then to estimate the remaining operating time before the device shuts down.
+
+In particular, given (measured, prescribed, or scenario-generated) time series describing user/device usage and ambient conditions, we aim to:
+(i) predict the trajectories of key battery states (e.g., state-of-charge and temperature) and the terminal voltage;
+(ii) compute the time-to-empty (TTE) defined by physically meaningful shutdown criteria; and
+(iii) interpret sudden shutdown phenomena through explicit feasibility mechanisms rather than black-box regression.
+
+\subsection{Inputs, Outputs, and Prediction Tasks}
+\label{subsec:io_tasks}
+We represent the battery-in-phone system by a state vector
+\[
+\mathbf{x}(t)=[z(t),\,v_p(t),\,T_b(t),\,S(t),\,w(t)]^\top,
+\]
+where \(z\) is state-of-charge (SOC), \(v_p\) is polarization voltage (memory effect of the ECM),
+\(T_b\) is battery temperature, \(S\) is state-of-health (SOH, capacity fraction), and \(w\) is the radio tail state.
+
+The exogenous inputs are collected as
+\[
+\mathbf{u}(t)=[L(t),\,C(t),\,N(t),\,\Psi(t),\,T_a(t)]^\top,
+\]
+where \(L\in[0,1]\) denotes normalized screen brightness,
+\(C\in[0,1]\) the normalized CPU load,
+\(N\in[0,1]\) the normalized network activity level (throughput/airtime proxy),
+\(\Psi>0\) a signal-quality indicator (larger is better),
+and \(T_a\) the ambient temperature.
+
+\paragraph{Primary predicted outputs.}
+The model produces the battery terminal voltage and SOC trajectories,
+\[
+V_{\mathrm{term}}(t), \qquad z(t),
+\]
+as well as the time-to-empty (TTE), defined as the first time the device becomes inoperable under the specified shutdown criteria:
+\[
+\mathrm{TTE}=\inf\Big\{t>0:\ V_{\mathrm{term}}(t)\le V_{\mathrm{cut}}\ \text{or}\ z(t)\le 0\Big\}.
+\]
+Here \(V_{\mathrm{cut}}\) is the cutoff voltage dictated by system protection (BMS/PMIC).
+
+\paragraph{Prediction tasks.}
+Given \(\mathbf{x}(0)\) and a future input profile \(\mathbf{u}(t)\) on a horizon \([0,T]\), the prediction tasks are:
+\begin{enumerate}
+  \item \textbf{State/voltage forecasting:} compute \(\mathbf{x}(t)\) and \(V_{\mathrm{term}}(t)\) for \(t\in[0,T]\);
+  \item \textbf{Runtime estimation:} compute \(\mathrm{TTE}\) from the stopping rule above;
+  \item \textbf{Mechanistic interpretation:} attribute shutdown to depletion (\(z\to 0\)) or voltage protection (\(V_{\mathrm{term}}\le V_{\mathrm{cut}}\)), and quantify risk of power infeasibility (Section~\ref{subsec:metrics_scenarios}).
+\end{enumerate}
+
+\subsection{Performance Metrics and Usage-Scenario Description}
+\label{subsec:metrics_scenarios}
+
+\paragraph{Operational termination and reliability-oriented metrics.}
+The principal performance metric is the operating time before shutdown, \(\mathrm{TTE}\).
+For evaluation and comparison across scenarios, we also report:
+\begin{itemize}
+  \item \textbf{Terminal-voltage margin:} \(\min_{t\in[0,\mathrm{TTE}]}(V_{\mathrm{term}}(t)-V_{\mathrm{cut}})\), which indicates how close the device operates to the cutoff boundary;
+  \item \textbf{Delivered-energy proxy:} \(E_{\mathrm{del}}=\int_{0}^{\mathrm{TTE}} V_{\mathrm{term}}(t)I(t)\,dt\) (when current \(I(t)\) is available from the closure), which supports sanity checks against SOC depletion;
+  \item \textbf{Thermal exposure:} \(\max_{t\in[0,\mathrm{TTE}]} T_b(t)\), reflecting potential thermal throttling or safety constraints.
+\end{itemize}
+
+\paragraph{Risk event: CPL feasibility (voltage-collapse risk).}
+Because the load is modeled as a constant-power demand (CPL) coupled to the electrochemical model, a feasibility condition naturally arises.
+Let
+\[
+\Delta(t)=\big(V_{\mathrm{oc}}(z(t)) - v_p(t)\big)^2 - 4R_0(T_b(t),S(t))\,P_{\mathrm{tot}}(t),
+\]
+where \(P_{\mathrm{tot}}(t)\) is the demanded total power and \(R_0\) the ohmic resistance.
+When \(\Delta(t)<0\), the CPL algebraic closure admits no real current solution, indicating that the demanded power is infeasible given the instantaneous battery capability and may lead to abrupt voltage collapse.
+We therefore introduce the \emph{first risk time}
+\[
+t_{\Delta}=\inf\{t>0:\ \Delta(t)\le 0\},
+\]
+as an auxiliary diagnostic.
+In later sections, we use \(t_\Delta\) to distinguish \emph{infeasibility-driven} shutdown risk from ordinary energy depletion.
+
+\paragraph{Representative usage scenarios.}
+To ensure that conclusions are interpretable and reproducible, we evaluate the model under a small set of canonical usage scenarios, each defined by a characteristic input pattern \(\mathbf{u}(t)\).
+Table~\ref{tab:scenarios} summarizes the scenarios used throughout the paper.
+
+\begin{table}[t]
+\centering
+\caption{Representative usage scenarios and their qualitative input characteristics.}
+\label{tab:scenarios}
+\begin{tabular}{p{2.4cm}p{10.6cm}}
+\hline
+Scenario & Input characteristics \(\mathbf{u}(t)=[L(t),C(t),N(t),\Psi(t),T_a(t)]^\top\) \\
+\hline
+Standby/Idle &
+Low brightness \(L\approx 0\) (screen off), low CPU \(C\ll 1\), sporadic network \(N\approx 0\) with residual tail \(w\), typical \(\Psi\), moderate \(T_a\). \\
+Browsing/Social &
+Moderate \(L\), moderate CPU \(C\), intermittent network bursts \(N(t)\) with tail effects, typical-to-good \(\Psi\), moderate \(T_a\). \\
+Video Streaming &
+High \(L\), sustained moderate CPU \(C\), sustained network activity \(N\) (downlink), sensitivity to \(\Psi\); moderate \(T_a\). \\
+Gaming/High Compute &
+High \(L\), high CPU \(C\) (near saturation), moderate network \(N\), typical \(\Psi\); emphasizes thermal rise and possible throttling. \\
+Weak Signal (Stress) &
+Moderate-to-high \(L\), moderate CPU \(C\), nontrivial \(N\) under poor signal \(\Psi\downarrow\); stresses the signal-quality penalty in \(P_{\mathrm{net}}(N,\Psi,w)\) and increases collapse risk. \\
+Cold Ambient (Stress) &
+Any of the above with low \(T_a\); highlights increased \(R_0\) and reduced \(Q_{\mathrm{eff}}\), potentially shortening TTE and increasing \(t_\Delta\) likelihood. \\
+\hline
+\end{tabular}
+\end{table}
+
+The above scenarios are not tied to a specific dataset; they can be instantiated using recorded traces or generated synthetically (e.g., piecewise-smooth profiles or stochastic processes) while keeping the same physical meaning of each input channel.
+This design supports both deterministic simulations and uncertainty quantification (Monte Carlo) in later sections.
+%========================================================

A题/成文/3符号说明与变量定义.md

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+% =========================================================
+% Section 3: Nomenclature (Symbols and Variables)
+% This block is self-contained and can be pasted into the paper.
+% =========================================================
+
+\section{Nomenclature: Symbols and Variables}\label{sec:nomenclature}
+
+To ensure clarity and reproducibility, this section summarizes the state variables, exogenous inputs, model outputs, derived quantities, and the parameter set used throughout the paper. All symbols are consistent with the mechanistic continuous-time framework defined in Sections~\ref{sec:model}--\ref{sec:numerics}.
+
+\subsection{State Vector $\mathbf{x}(t)$}\label{subsec:state}
+We define the state vector
+\begin{equation}
+\mathbf{x}(t)=\big[z(t),\,v_p(t),\,T_b(t),\,S(t),\,w(t)\big]^\top.
+\end{equation}
+\begin{table}[h!]
+\centering
+\caption{State variables in $\mathbf{x}(t)$.}\label{tab:states}
+\begin{tabular}{lll}
+\hline
+Symbol & Meaning & Typical range / unit \\
+\hline
+$z(t)$ & State of charge (SOC) & $[0,1]$ \\
+$v_p(t)$ & Polarization voltage (RC memory state) & V \\
+$T_b(t)$ & Battery (cell) temperature & K \\
+$S(t)$ & State of health (SOH), capacity fraction & $[0,1]$ \\
+$w(t)$ & Radio tail state (continuous tail activity) & $[0,1]$ \\
+\hline
+\end{tabular}
+\end{table}
+
+\subsection{Input Vector $\mathbf{u}(t)$}\label{subsec:input}
+The exogenous usage/environment inputs are
+\begin{equation}
+\mathbf{u}(t)=\big[L(t),\,C(t),\,N(t),\,\Psi(t),\,T_a(t)\big]^\top.
+\end{equation}
+\begin{table}[h!]
+\centering
+\caption{Inputs in $\mathbf{u}(t)$.}\label{tab:inputs}
+\begin{tabular}{lll}
+\hline
+Symbol & Meaning & Typical range / unit \\
+\hline
+$L(t)$ & Screen brightness (normalized) & $[0,1]$ \\
+$C(t)$ & CPU load (normalized) & $[0,1]$ \\
+$N(t)$ & Network activity / throughput proxy (normalized) & $[0,1]$ \\
+$\Psi(t)$ & Signal quality (larger is better) & dimensionless or normalized \\
+$T_a(t)$ & Ambient temperature & K \\
+\hline
+\end{tabular}
+\end{table}
+
+\subsection{Outputs and Derived Quantities}\label{subsec:outputs-derived}
+The primary outputs are the terminal voltage $V_{\mathrm{term}}(t)$, the SOC $z(t)$, and the time-to-empty (TTE). In addition, several derived quantities are used to couple the load-side power demand to the battery-side electro-thermal dynamics.
+
+\paragraph{(i) Total power demand.}
+The total power consumption is decomposed into background, screen, CPU, and networking components:
+\begin{equation}
+P_{\mathrm{tot}}(t)=P_{\mathrm{bg}}+P_{\mathrm{scr}}(L(t))+P_{\mathrm{cpu}}(C(t))+P_{\mathrm{net}}(N(t),\Psi(t),w(t)),
+\label{eq:Ptot_def}
+\end{equation}
+where
+\begin{align}
+P_{\mathrm{scr}}(L)&=P_{\mathrm{scr},0}+k_L L^\gamma,\qquad \gamma>1, \label{eq:Pscr_def}\\
+P_{\mathrm{cpu}}(C)&=P_{\mathrm{cpu},0}+k_C C^\eta,\qquad \eta>1, \label{eq:Pcpu_def}\\
+P_{\mathrm{net}}(N,\Psi,w)&=P_{\mathrm{net},0}+k_N\frac{N}{(\Psi+\varepsilon)^\kappa}+k_{\mathrm{tail}}w,\qquad \kappa>0. \label{eq:Pnet_def}
+\end{align}
+
+\paragraph{(ii) Terminal voltage.}
+The battery terminal voltage is given by the first-order equivalent circuit model (ECM):
+\begin{equation}
+V_{\mathrm{term}}(t)=V_{\mathrm{oc}}(z(t)) - v_p(t) - I(t)\,R_0(T_b(t),S(t)).
+\label{eq:Vterm_def}
+\end{equation}
+
+\paragraph{(iii) CPL feasibility discriminant.}
+Under the constant-power-load (CPL) closure $P_{\mathrm{tot}}=V_{\mathrm{term}}I$, the algebraic current solve yields the discriminant
+\begin{equation}
+\Delta(t)=\big(V_{\mathrm{oc}}(z(t))-v_p(t)\big)^2-4\,R_0(T_b(t),S(t))\,P_{\mathrm{tot}}(t).
+\label{eq:Delta_def}
+\end{equation}
+The CPL current is real-valued only if $\Delta(t)\ge 0$. When $\Delta(t)<0$, the requested power is infeasible given the instantaneous electrochemical state, which corresponds to a voltage-collapse risk event in the model.
+
+\paragraph{(iv) Time-to-empty (TTE).}
+The operational end time is defined by the earliest occurrence among voltage cutoff and SOC depletion:
+\begin{equation}
+\mathrm{TTE}=\inf\left\{t>0:\;V_{\mathrm{term}}(t)\le V_{\mathrm{cut}}\ \text{or}\ z(t)\le 0\right\}.
+\label{eq:TTE_def}
+\end{equation}
+
+\begin{table}[h!]
+\centering
+\caption{Key outputs and derived quantities.}\label{tab:derived}
+\begin{tabular}{lll}
+\hline
+Symbol & Meaning & Unit \\
+\hline
+$V_{\mathrm{term}}(t)$ & Terminal voltage & V \\
+$I(t)$ & Battery current (discharge positive) & A \\
+$P_{\mathrm{tot}}(t)$ & Total power demand & W \\
+$V_{\mathrm{oc}}(z)$ & Open-circuit voltage (OCV) & V \\
+$\Delta(t)$ & CPL feasibility discriminant & V$^2$ \\
+$\mathrm{TTE}$ & Time-to-empty (operation end time) & s (or min, h) \\
+$V_{\mathrm{cut}}$ & Voltage cutoff threshold & V \\
+\hline
+\end{tabular}
+\end{table}
+
+\subsection{Parameter Set and Units}\label{subsec:params}
+Let $\Theta$ denote the full parameter set. For transparency, we group parameters by subsystem: load-side power mapping, ECM, thermal, and aging. Parameters may be identified from pulse tests, OCV--SOC curves, and device-level power measurements as described in Section~\ref{sec:numerics}.
+
+\paragraph{(a) Power mapping parameters.}
+\begin{table}[h!]
+\centering
+\caption{Power mapping parameters (load-side).}\label{tab:params_power}
+\begin{tabular}{llll}
+\hline
+Parameter & Meaning & Unit & Source / identification \\
+\hline
+$P_{\mathrm{bg}}$ & Background power & W & idle measurement \\
+$P_{\mathrm{scr},0}$ & Screen baseline power & W & brightness sweep \\
+$k_L$ & Screen power coefficient & W & brightness sweep \\
+$\gamma$ & Screen superlinearity exponent & -- & brightness sweep \\
+$P_{\mathrm{cpu},0}$ & CPU baseline power & W & CPU micro-benchmark \\
+$k_C$ & CPU power coefficient & W & CPU micro-benchmark \\
+$\eta$ & CPU superlinearity exponent & -- & CPU micro-benchmark \\
+$P_{\mathrm{net},0}$ & Network baseline power & W & network idle \\
+$k_N$ & Network activity coefficient & W & fixed-throughput tests \\
+$\kappa$ & Signal-quality penalty exponent & -- & $\log$--$\log$ fit vs $\Psi$ \\
+$\varepsilon$ & Signal-quality regularizer & same as $\Psi$ & chosen small, prevents singularity \\
+$k_{\mathrm{tail}}$ & Tail power coefficient & W & tail decay fit \\
+$\tau_\uparrow,\tau_\downarrow$ & Tail rise/decay time constants & s & tail transient fit \\
+\hline
+\end{tabular}
+\end{table}
+
+\paragraph{(b) ECM and electrochemical parameters.}
+\begin{table}[h!]
+\centering
+\caption{ECM/electrochemical parameters.}\label{tab:params_ecm}
+\begin{tabular}{llll}
+\hline
+Parameter & Meaning & Unit & Source / identification \\
+\hline
+$E_0,K,A,B$ & Modified Shepherd OCV parameters & (V, V, V, --) & OCV--SOC curve fit \\
+$R_{\mathrm{ref}}$ & Reference ohmic resistance & $\Omega$ & pulse $\Delta V(0^+)/\Delta I$ \\
+$E_a$ & Activation energy for $R_0(T)$ & J/mol & multi-$T$ resistance fit \\
+$T_{\mathrm{ref}}$ & Reference temperature & K & fixed (e.g., 298 K) \\
+$\eta_R$ & SOH-to-resistance coefficient & -- & multi-SOH resistance fit \\
+$R_1$ & Polarization resistance & $\Omega$ & pulse relaxation \\
+$C_1$ & Polarization capacitance & F & pulse relaxation \\
+\hline
+\end{tabular}
+\end{table}
+
+\paragraph{(c) Capacity and thermal parameters.}
+\begin{table}[h!]
+\centering
+\caption{Capacity and thermal parameters.}\label{tab:params_thermal}
+\begin{tabular}{llll}
+\hline
+Parameter & Meaning & Unit & Source / identification \\
+\hline
+$Q_{\mathrm{nom}}$ & Nominal capacity & Ah & datasheet / capacity test \\
+$\alpha_Q$ & Temperature-capacity coefficient & 1/K & multi-$T$ capacity test \\
+$C_{\mathrm{th}}$ & Lumped thermal capacitance & J/K & heating transient fit \\
+$hA$ & Effective heat transfer coefficient & W/K & cooling transient fit \\
+\hline
+\end{tabular}
+\end{table}
+
+\paragraph{(d) Aging (SOH) parameters.}
+\begin{table}[h!]
+\centering
+\caption{SOH degradation parameters (SEI-driven compact model).}\label{tab:params_aging}
+\begin{tabular}{llll}
+\hline
+Parameter & Meaning & Unit & Source / identification \\
+\hline
+$\lambda_{\mathrm{sei}}$ & SEI degradation rate prefactor & s$^{-1}$A$^{-m}$ & aging dataset fit \\
+$m$ & Current-stress exponent & -- & aging dataset fit \\
+$E_{\mathrm{sei}}$ & SEI activation energy & J/mol & aging dataset fit \\
+$R_g$ & Universal gas constant & J/(mol$\cdot$K) & constant \\
+\hline
+\end{tabular}
+\end{table}
+
+\paragraph{(e) Robustness/control micro-adjustments.}
+The following quantities support numerical robustness and device-level throttling without altering the core mechanism:
+\begin{equation}
+z_{\min}\in(0,1)\ \text{(low-SOC guard for OCV evaluation)},\qquad
+V_{\mathrm{cut}}\ \text{(shutdown voltage)},\qquad
+I_{\max,0},\rho_T\ \text{(current limit parameters)}.
+\end{equation}
+Their calibration and usage are detailed in Section~\ref{sec:numerics}.
+
+% End of Section 3

A题/成文/4模型假设.md

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+\section{Assumptions}\label{sec:assumptions}
+
+To balance physical fidelity, interpretability, and computational tractability, we adopt the following modeling assumptions. These assumptions are consistent with the continuous-time, mechanism-driven framework developed in Sections~\ref{sec:model_formulation}--\ref{sec:numerics} and are intended to match typical smartphone operating conditions.
+
+\subsection{Structural Assumptions}\label{sec:assumptions_structural}
+\begin{enumerate}
+  \item \textbf{Single-cell lumped equivalent.}
+  The battery pack is represented by an equivalent single cell with lumped electrical and thermal states. The terminal behavior is captured by a first-order equivalent circuit model (ECM) comprising open-circuit voltage (OCV), an ohmic resistance, and one polarization (RC) branch.
+
+  \item \textbf{Additive component power mapping.}
+  The device power demand is decomposed into additive contributions from background processes, display, CPU, and network subsystems:
+  \(
+  P_{\mathrm{tot}} = P_{\mathrm{bg}} + P_{\mathrm{scr}}(L) + P_{\mathrm{cpu}}(C) + P_{\mathrm{net}}(N,\Psi,w).
+  \)
+  Cross-couplings among subsystems (e.g., CPU--network interactions) are treated as second-order effects and are absorbed into the calibrated parameters of the component maps.
+
+  \item \textbf{Normalized inputs and bounded states.}
+  Usage inputs are normalized to dimensionless intensities \(L,C,N\in[0,1]\), and the radio-tail state satisfies \(w\in[0,1]\). State variables are interpreted physically and are constrained to admissible ranges (e.g., \(z\in[0,1]\), \(S\in[0,1]\)) up to numerical tolerances.
+\end{enumerate}
+
+\subsection{Load-Side Assumptions}\label{sec:assumptions_load}
+\begin{enumerate}
+  \item \textbf{Constant-power load (CPL) closure.}
+  Over the modeling time scale, the smartphone power management system is approximated as imposing an instantaneous power demand \(P_{\mathrm{tot}}(t)\) at the battery terminals, i.e.,
+  \(
+  P_{\mathrm{tot}}(t)=V_{\mathrm{term}}(t)\,I(t).
+  \)
+  This CPL closure is used to capture the key nonlinear feedback whereby decreasing terminal voltage can induce increasing current draw under fixed power demand.
+
+  \item \textbf{Feasibility interpretation via discriminant.}
+  The quadratic CPL relation yields a discriminant \(\Delta(t)\). When \(\Delta(t)<0\), sustaining the requested power with the current electrical state is infeasible, indicating a voltage-collapse risk. This provides a mechanistic explanation for ``sudden shutdown'' events observed in practice.
+
+  \item \textbf{Optional derating (current/power limiting).}
+  Smartphones typically derate performance (e.g., frequency throttling or PMIC current limiting) under low-voltage or high-temperature conditions. We therefore allow an optional saturation policy, e.g.,
+  \(
+  I(t)=\min\{I_{\mathrm{CPL}}(t),\,I_{\max}(T_b(t))\},
+  \)
+  which preserves the original CPL behavior when \(I_{\mathrm{CPL}}\le I_{\max}\) while enabling safe operation (at reduced delivered power) when the requested power would otherwise drive excessive current.
+\end{enumerate}
+
+\subsection{Thermal Assumptions}\label{sec:assumptions_thermal}
+\begin{enumerate}
+  \item \textbf{Lumped thermal capacitance.}
+  The battery temperature is modeled by a single lumped node \(T_b(t)\) with effective thermal capacitance \(C_{\mathrm{th}}\). Spatial gradients within the cell or across the device chassis are neglected.
+
+  \item \textbf{Dominant heat sources and linear heat rejection.}
+  Heat generation is attributed to ohmic loss and polarization-branch dissipation, while heat rejection to the environment is modeled by linear convection/conduction:
+  \[
+  \dot T_b=\frac{1}{C_{\mathrm{th}}}\Big(I^2R_0+\frac{v_p^2}{R_1}-hA\,(T_b-T_a)\Big).
+  \]
+  Radiative effects and temperature dependence of \(hA\) are neglected over normal operating ranges.
+
+  \item \textbf{Ambient temperature as an exogenous input.}
+  The ambient temperature \(T_a(t)\) is treated as an external forcing. In typical usage scenarios, \(T_a\) varies slowly compared to the electrical dynamics.
+\end{enumerate}
+
+\subsection{Aging Assumptions}\label{sec:assumptions_aging}
+\begin{enumerate}
+  \item \textbf{Slow-time-scale degradation.}
+  The state-of-health \(S(t)\) evolves on a slower time scale than \(z(t)\), \(v_p(t)\), and \(T_b(t)\). Over short horizons (single discharge), \(S\) may be approximated as quasi-static; over longer horizons, cumulative degradation is captured by the aging ODE.
+
+  \item \textbf{SEI-dominated capacity fade surrogate.}
+  Capacity fade is represented by a compact SEI-driven rate law:
+  \[
+  \dot S=-\lambda_{\mathrm{sei}}|I|^{m}\exp\!\left(-\frac{E_{\mathrm{sei}}}{R_gT_b}\right),
+  \qquad 0\le m\le 1,
+  \]
+  which captures acceleration with higher current magnitude and higher temperature. More detailed mechanistic extensions (e.g., explicit SEI thickness) are outside the present scope.
+
+  \item \textbf{Aging impacts through resistance and effective capacity.}
+  The influence of \(S\) on instantaneous discharge behavior is mediated through (i) an SOH correction in the ohmic resistance \(R_0(T_b,S)\) and (ii) a proportional scaling of effective capacity \(Q_{\mathrm{eff}}(T_b,S)\). Other aging pathways (e.g., lithium plating, impedance spectra changes beyond a single RC branch) are neglected.
+\end{enumerate}
+
+\subsection{Boundaries and Applicability}\label{sec:assumptions_scope}
+The proposed model is intended for \emph{discharge-dominated} smartphone operation under typical environmental conditions and is not designed to capture the following regimes without further extensions:
+\begin{enumerate}
+  \item \textbf{Fast charging or charging--discharging transients.}
+  Charging dynamics, CC--CV charging protocols, and charger-induced thermal effects are not modeled.
+
+  \item \textbf{Extreme temperatures and protection-layer behavior.}
+  Very low-temperature operation (where diffusion limitations, severe capacity loss, or protection circuitry dominates) and very high temperatures beyond normal thermal management limits are outside scope.
+
+  \item \textbf{Severe voltage-sag and hardware protection events.}
+  Hard cutoffs triggered by hardware protection (e.g., overcurrent, undervoltage lockout, or thermal shutdown) are approximated by the terminal-voltage cutoff \(V_{\mathrm{cut}}\) and the CPL feasibility indicator; detailed PMIC internal logic is not explicitly modeled.
+
+  \item \textbf{Detailed multi-physics and spatial effects.}
+  Spatially distributed thermal fields, electrode-level electrochemical PDE models, and multi-cell balancing are not included; the goal is a compact mechanism-driven model suitable for scenario simulation and sensitivity analysis.
+
+  \item \textbf{Application-specific internal scheduling.}
+  Fine-grained OS scheduling, DVFS at sub-second resolution, and app-level state machines are abstracted into the exogenous inputs \(L(t),C(t),N(t),\Psi(t)\) and (optionally) the derating function \(I_{\max}(T_b)\).
+\end{enumerate}
+
+In summary, these assumptions yield a compact continuous-time model that remains physically interpretable, numerically stable, and sufficiently expressive to study runtime prediction, voltage-collapse risk, and the impact of temperature and aging under representative smartphone usage patterns.