部分成文

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# Front Matter封面与前置页
## Title题目
**A Mechanism-Driven Continuous-Time Model for Smartphone Battery Drain Under Constant-Power Loads: Component Power Mapping, Electro-Thermal-Aging Coupling, and Feasibility-Based Shutdown Prediction**
(若你们中文论文:
**基于恒功率负载闭环的智能手机电池连续时间机理模型:功耗分解、热-电-老化耦合与可行性掉电判据**
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## Team Information队伍信息按比赛模板填写
* **Team Control Number:** [填写]
* **School/Institution:** [填写]
* **Team Members:** [填写]
* **Date:** [填写]
> 注:这一块通常由比赛提交模板决定,你只要把占位符替换成官方要求格式即可。
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## Abstract摘要
Smartphone runtime is governed by multi-source, time-varying power demands from the screen, CPU, and wireless communication, and it often exhibits nonlinear behaviors such as abrupt shutdown at low state-of-charge (SOC), low temperature, or advanced aging. To capture these mechanisms, we develop a continuous-time, physics-informed model featuring a state vector (\mathbf{x}(t)=[z(t),v_p(t),T_b(t),S(t),w(t)]^\top), where (z) is SOC, (v_p) is polarization voltage (memory), (T_b) is battery temperature, (S) is state-of-health (SOH), and (w) represents a continuous network “tail” state. Exogenous inputs (\mathbf{u}(t)=[L(t),C(t),N(t),\Psi(t),T_a(t)]^\top) describe screen brightness, CPU load, network activity, signal quality, and ambient temperature, respectively. Total power demand is decomposed explicitly into screen/CPU/network components, with the network term incorporating a signal-quality penalty and tail dynamics. On the battery side, a first-order equivalent circuit model (ECM) is coupled to the load through a constant power load (CPL) closure, yielding a nonlinear currentvoltage feedback and a feasibility discriminant (\Delta(t)\ge 0) that explains voltage collapse and sudden shutdown. Temperature- and SOH-dependent internal resistance and effective capacity are included via Arrhenius and capacity-scaling relations, while a compact SEI-inspired degradation law governs SOH evolution. For robustness and device realism, we add three lightweight refinements: (i) a low-SOC regularization in the OCV model, (ii) a nonnegative polarization heat formulation, and (iii) a temperature-dependent current cap representing OS/PMIC throttling. The resulting framework supports numerical simulation, time-to-empty (TTE) prediction, uncertainty quantification, and actionable power-management recommendations.
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## Keywords关键词
Smartphone battery drain; constant power load (CPL); equivalent circuit model (ECM); electro-thermal coupling; battery aging (SOH); network tail energy; feasibility discriminant; time-to-empty (TTE)
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# Summary SheetMCM 一页摘要页 / Executive Summary
> **说明**:这一页要“像海报一样快读”。下面版本是可直接交稿的结构;你们跑完仿真后把括号内结果补上即可。
## Problem
We are asked to model smartphone battery drain in continuous time under realistic, time-varying usage. The model must predict battery terminal voltage and SOC evolution and determine the time-to-empty (TTE), while explaining nonlinear shutdown behaviors (e.g., abrupt power-off before SOC reaches zero) under adverse conditions such as poor signal quality, low temperature, and aging.
## Model Overview
**States and inputs.** We define the state vector
[
\mathbf{x}(t)=[z(t),v_p(t),T_b(t),S(t),w(t)]^\top,
]
where (z) is SOC, (v_p) is polarization voltage, (T_b) is battery temperature, (S) is SOH, and (w) is the continuous network tail state. Inputs are
[
\mathbf{u}(t)=[L(t),C(t),N(t),\Psi(t),T_a(t)]^\top,
]
describing brightness, CPU load, network activity, signal quality, and ambient temperature.
**Component-level power mapping.** Total demanded power is decomposed as
[
P_{\mathrm{tot}}=P_{\mathrm{bg}}+P_{\mathrm{scr}}(L)+P_{\mathrm{cpu}}(C)+P_{\mathrm{net}}(N,\Psi,w),
]
with superlinear screen/CPU mappings and an explicit signal-quality penalty plus tail term in the network power.
**Battery dynamics and CPL closure.** A first-order ECM gives terminal voltage
[
V_{\mathrm{term}}=V_{\mathrm{oc}}(z)-v_p-I R_0(T_b,S).
]
The load is modeled as a constant power load (CPL),
[
P_{\mathrm{tot}}=V_{\mathrm{term}}I,
]
leading to a quadratic current solution and a feasibility discriminant
[
\Delta=(V_{\mathrm{oc}}-v_p)^2-4R_0P_{\mathrm{tot}}.
]
When (\Delta<0), maintaining the demanded power becomes infeasible, providing a mechanism for voltage collapse and abrupt shutdown.
**Electro-thermal-aging coupling.** SOC, polarization, temperature, and SOH evolve via coupled ODEs (including Arrhenius resistance, temperature/SOH-dependent effective capacity, and an SEI-inspired SOH decay law). Network tail energy is captured by a continuous-time tail state (w(t)).
**Robustness refinements (lightweight, non-invasive).**
1. Low-SOC regularization in OCV using (z_{\mathrm{eff}}=\max(z,z_{\min})) to avoid singularity.
2. Nonnegative polarization heat via (v_p^2/R_1) in the thermal source term.
3. A temperature-dependent current cap (I=\min(I_{\mathrm{CPL}},I_{\max}(T_b))) to represent OS/PMIC throttling.
## Numerical Method
We solve the coupled ODEs using RK4 (or an adaptive RungeKutta method) with a nested algebraic current evaluation at each substep. Step size is constrained by the polarization time constant (\tau_p=R_1C_1), and convergence is verified by step-halving until (|z_{\Delta t}-z_{\Delta t/2}|_\infty<10^{-4}), with TTE changes below 1%.
## Key Results (to be filled with your simulations)
* **Baseline runtime (TTE):** mean (\approx) [***] h, median (\approx) [***] h, 5th95th percentile ([***],[***]) h under the baseline usage scenario.
* **Sudden shutdown mechanism:** infeasibility events ((\Delta<0)) occur primarily when [high demand + elevated (R_0)] coincide (e.g., weak signal (\Psi\downarrow), low (T_b), low (S)), precipitating rapid voltage collapse.
* **Impact of throttling (current cap):** applying (I_{\max}(T_b)) increases the 5th-percentile TTE by approximately [***]%, and reduces infeasibility/shutdown-risk events by [***]%.
* **Sensitivity (Sobol):** the largest total-effect indices are associated with [(k_N,\kappa)] under weak-signal regimes and with [(k_L,\gamma)] under high-brightness usage; ambient temperature (T_a) shows strong interaction effects via (R_0(T_b,S)) and (Q_{\mathrm{eff}}(T_b,S)).
## Conclusions
We present a mechanism-driven continuous-time smartphone battery model that unifies (i) component-level power demand with explicit signal-quality effects and network tail energy, (ii) an ECM battery model coupled through a CPL closure, and (iii) electro-thermal-aging interactions. The feasibility discriminant (\Delta) provides an interpretable explanation for abrupt shutdown behaviors beyond simple SOC depletion.
## Recommendations
* **User-level:** reduce brightness (L) and avoid sustained high-throughput activity (N) in poor signal conditions ((\Psi) low) to mitigate network power amplification and tail energy.
* **System-level (OS/PMIC):** implement adaptive power caps or temperature-dependent current limits to prevent CPL-driven current escalation at low voltage/high resistance, thereby improving worst-case runtime and reducing collapse risk.
* **Network-level:** tail-state-aware scheduling (batching transmissions) can reduce (w(t)) and tail energy, improving TTE with minimal user impact.
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